1. Field of the Invention
The present invention relates to a semiconductor apparatus mounted using solder or other metal bumps and a process of production of the same.
2. Description of the Related Art
In recent years, digital video cameras, digital cellular phones, notebook-type personal computers, and other portable electronic equipment have spread widely. There are mounting demands for reducing the size, reducing the thickness, and reducing the weight of these portable electronic equipment.
To realize this reduction in size, reduction in thickness, and reduction in weight of portable electronic equipment, the most important issue is the improvement of the mounting density of the components.
In particular, even in semiconductor ICs and other semiconductor devices, high density mounting technology using flip-chip-type semiconductor devices instead of the package-type semiconductor devices of the related art is being developed and put into practical use.
In the past, as the form of packaging of semiconductor apparatuses, use has been made of DIP (Dual Inline Package) or PGA (Pin Grid Array) and other through hole mounted devices (THD) mounted to printed circuit boards by inserting leads through holes provided there and QFP (Quad Flat (L-Leaded) Package) or TCP (Tape Carrier Package) or other surface mounted devices (SMD) mounted by soldering leads to the surfaces of the boards.
To further reduce sizes, attention has focused on the method of mounting a semiconductor chip with its pad opening surface facing the mounting board by a package called a chip size package (CSP, also called a FBGA (Fine-Pitch BGA)) for realizing further smaller sizes and higher densities to bring the package size extremely close to the size of the semiconductor chip (flip-chip mounting). Active research has been conducted up until now and numerous proposals have been made.
One of the mounting methods for mounting such a flip-chip type semiconductor device (flip-chip mounting) is for example the method of forming for example spherically shaped (ball shaped) solder bumps (solder ball bumps) on electrode pads comprised of aluminum (Al) etc. of a semiconductor IC and bringing the connection terminals of the semiconductor IC into contact with the solder ball bumps to directly mount the IC chip on a printed circuit board.
A semiconductor apparatus comprised of a CSP type semiconductor chip mounted on a mounting board will be explained with reference to the drawings.
FIG. 11 is a sectional view of the above semiconductor apparatus.
The surface of the semiconductor device (semiconductor wafer) 10 on which electrode pads 11 comprised of Al etc. are formed is covered for example by a first surface protective film 12 comprised of a silicon nitride layer and a second surface protective film 13 comprised of a polyimide layer in a state leaving only the electrode pad 11 portions open. Further, a conductive film 14 comprised of a stacked films of chrome (Cr), copper (Cu), gold (Au), etc. is formed at the openings of the electrode pad 11 portions to be connected to the electrode pads 11. The conductive film is sometimes called a BLM (Ball Limiting Metal) film.
Further, solder bumps 16b comprised of for example high melting point solder balls are formed connected to the conductive film (BLM film) 14.
A CSP type semiconductor chip 1 is constituted in this way.
On the other hand, the mounting board 2 is a board 20 comprised of for example a glass epoxy-based material on the top of which are provided lands (electrodes) 21 formed at positions corresponding to the positions of formation of the solder bumps 16b of the semiconductor chip 1 to be mounted and comprised of copper etc. and a not shown printed circuit connected to the lands 21 and formed on the front surface or back surface or the two surfaces of the board 20. The surface of the board 20 other than the land 21 portions is covered by a solder resist 23.
The above CSP type semiconductor chip 1 is mounted on the mounting board 2 with the bumps 16b aligned with the lands 21. The bumps 16b and lands 21 are mechanically and electrically connected by eutectic solder layers 19.
Further, the space between the CSP type semiconductor chip 1 and mounting board 2 is sealed by a sealing resin 3 comprised of an epoxy resin etc.
In the above semiconductor apparatus, as the method of forming the bumps at predetermined positions, for example there is known the method of using electrolytic plating. In this case, there is the disadvantage that the thickness of the solder bumps formed is affected by the surface conditions of the layer of material forming the underlayer of the bumps or the slight variation in the electrical resistance and that the formation of uniform solder bumps of the same height in a semiconductor chip is extremely difficult.
Therefore, a method is being developed for formation of solder ball bumps with a uniform height using formation of a solder film by vacuum deposition and lift-off of the photoresist layer.
This method will be explained below with reference to the drawings.
First, as shown in FIG. 12A, electrode pads 11 comprised of an aluminum (Al) and copper (Cu) alloy etc. are formed by patterning on a semiconductor wafer 10 formed with circuit patterns of semiconductor chips by for example the sputtering method or etching etc. and a surface protective film 13 comprised of for example a silicon nitride layer or polyimide layer etc. is formed on top of it covering the entire surface.
The electrode pad 11 portions of the surface protective layer 13 are opened, then for example a pattern is formed by the sputtering method so as to connect a conductive layer (BLM layer) 14 comprised of a stacked film of chrome, copper, and gold to the electrode pads 11.
Next, as shown in FIG. 12B, a resist film R2 having pattern openings P is formed by patterning at the conductive film (BLM film) 14 forming areas by a photolithography step.
Next, as shown in FIG. 12C, solder layers 16 are formed in the pattern openings P of the resist film R2 by forming a solder layer over the entire surface by for example a vacuum evaporation method. At this time, solder layers 16a are formed over the resist film R2 as well.
Next, as shown in FIG. 13A, the solder layers 16a formed over the resist film R2 are simultaneously removed by removing the resist film R2 by lift-off. Due to this, it is possible to leave only the solder layers 16 formed in the pattern openings P of the resist film R2.
Next, as shown in FIG. 13B, heat treatment is performed to make the solder layers 16 melt. These are cooled and solidified in a state forming spheres due to the surface tension so as to form solder ball bumps 16b. 
As explained above, the solder ball bumps 16b are formed in the semiconductor wafer state (that is, the state before being cut into individual semiconductor chips).
The semiconductor wafer formed with the solder ball bumps 16b in this way is cut by dicing etc. into individual semiconductor chips, then as shown in FIG. 11, the solder ball bumps 16b are made to abut against the lands 21 comprised of Cu etc. formed on the board 20 of the mounting board 2.
Here, the board 20 is covered by a solder resist 23 over its entire front surface except for the lands 21 and is precoated by a eutectic solder layer 19 over the areas of the lands 21 or the surfaces of the solder ball bumps 16b. 
Therefore, using a reflow step, the eutectic solder 19 is melted and the melted eutectic solder enters between the solder ball bumps 16b and lands 21. By cooling and hardening it, the solder ball bumps 16b are soldered and electrically connected to the lands 21.
The thermal stress becomes a major disadvantage for the reliability of the joint by the bumps after flip-chip mounting due to the differences in the coefficients of heat expansion of the semiconductor chips and the mounting board (printed circuit board).
While the coefficient of heat expansion of silicon is 3.4 ppm/° C., the coefficient of heat expansion of the generally widely used glass epoxy-based mounting board is a large about 15 ppm/° C. When thermal stress is repeatedly applied to bump joints by the temperature difference caused by the on/off operation of a chip, cracks are caused in the joints and breakage or malfunctions are caused in some cases.
To deal with the above disadvantage, as shown in FIG. 11, the method is generally adopted of injecting a sealing resin 3 between the semiconductor chips 1 and mounting board 2 and relieving the thermal stress applied to the weak strength bump joints by having the stress of heat expansion received by the sealing resin as a whole.
In the above flip-chip mounting method of the related art, however, since the semiconductor chips and the mounting board are secured by a sealing resin, when a defect occurs in a device chip, the only method was to discard the entire mounting board 2 on which that semiconductor chip 1 was mounted or apply a chemical or mechanical external force to forcibly tear off that semiconductor chip.
Here, the replacement of the entire mounting board 2 of the former case has the disadvantage of the cost ending up higher, while the forcibly tearing off of the semiconductor chip 1 of the latter case ends up damaging the mounting board 2.
Therefore, the work of replacing a defective component in the case of a defect occurring in a semiconductor chip 1, that is, the so-called rework, is difficult. This has become one factor behind the failure of flip-chip mounting from spreading widely.
Further, along with the reduction of pitch accompanying the reduction of size of semiconductor devices, at the time of injection of the sealing resin, the circulation of the sealing resin 3 becomes poor and full injection of the sealing resin 3 can no longer be achieved, so there is also the disadvantage that the thermal stress cannot be sufficiently relieved.